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TB 371 2009 WG B4.40 Static Synchronous Series Compensator (SSSC)

The TB provides the basic principles of the Static Synchronous Series Compensator (SSSC), its functional features, basic characteristics and applications, and gives information on topologies, harmonic generation issues and modeling. It describes existing worldwide SSSC installations and presents a future outlook of SSSC.

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TABLE OF CONTENTS

PART I INTRODUCTION

1. UNDERSTANDING STATIC SYNCHRONOUS SERIES COMPENSATOR (SSSC) CONCEPT

      1.1 OPERATING PRINCIPLES

      1.2 BASIC CHARACTERISTICS

      1.3 APPLICATIONS

2. COMPARISON OF SSSC WITH OTHER TECHNOLOGIES

      2.1 FIXED SERIES CAPACITOR

      2.2 FIXED SERIES REACTOR

      2.3 PHASE ANGLE REGULATOR (PAR)

      2.4 THYRISTOR-CONTROLLED SERIES CAPACITOR (TCSC)

      2.5 GATE-CONTROLLED SERIES CAPACITOR (GCSC)

      2.6 MAGNETIC ENERGY RECOVERY SWITCH (MERS)

      2.7 DYNAMIC FLOW CONTROLLER (DYNAFLOW)

PART II TOPOLOGIES, HARMONICS, AND MODELING

3. VOLTAGE SOURCE CONVERTER (VSC) TOPOLOGIES

      3.1 MULTILEVEL VOLTAGE SOURCE CONVERTER TOPOLOGIES

      3.2 DIODE-CLAMPED MULTILEVEL CONVERTER

      3.3 FLYING-CAPACITOR MULTILEVEL CONVERTER

      3.4 CASCADED-MULTILEVEL CONVERTERS

      3.5 SSSC BASED ON CMC

      3.6 SINUSOIDAL OUTPUT GENERATION IN CMC

4. BASIC VSC STRUCTURES FOR SSSC AND HARMONIC GENERATION

      4.1 INTRODUCTION

      4.2 FORCED-COMMUTATED DC-AC STATIC CONVERTERS

      4.3 BASIC VSC TOPOLOGY

      4.4 BASIC VSC SWITCHING STRATEGIES

            4.4.1 Pulse Width Modulation VSC (VSC-PWM)

            4.4.2 Sinusoidal PWM

      4.5 VSC-3 WITH SINUSOIDAL PWM

            4.5.1 Three-phase VSC transformers connection

            4.5.2 Three single-phase VSC connection transformers

            4.5.3 PWM with selective harmonic elimination

            4.5.4 Considerations about PWM SSSC synthesis

            4.5.5 Square wave VSCs (6-pulse VSC)

            4.5.6 Square-wave operation of single-phase VSCs

            4.5.7 Considerations about SSSC synthesis with 6-pulse VSC

      4.6 MULTILEVEL VSC

      4.7 MULTIPULSE VSC

            4.7.1 Quasi 24-pulse VSC

            4.7.2 Quasi 24-pulse VSC

            4.7.3 Quasi 48-pulse VSC

      4.8 MULTI-LEVEL SINUSOIDAL PWM VSC

            4.8.1 Single phase PWM-VSC with multilevel output voltage

            4.8.2 Three-phase PWM-VSC with multi-level output voltage

      4.9 MULTIPULSE VSC WITH SELECTIVE HARMONIC ELIMINATION

5. SSSC LOADFLOW AND DYNAMIC SIMULATION STUDIES

      5.1 VSC CONTROLLER LOADFLOW MODELS

      5.2 BALANCED POSITIVE-SEQUENCE VOLTAGE SOURCE MODEL

      5.3 SSSC OPERATING MODES

      5.4 NEWTON-RAPHSON LOADFLOW SOLUTION

      5.5 OPERATING LIMITS

      5.6 COUPLING SERIES VSC TO ENERGY STORAGE DEVICES AND OTHER VSCS

      5.7 SSSC DISPATCH EXAMPLE

      5.8 SSSC DYNAMIC MODEL

      5.9 SSSC DYNAMIC SIMULATION

APPENDIX 5.1 4-BUS RADIAL SYSTEM PARAMETERS

6. EMTP SIMULATIONS OF SSSC

      6.1 INTRODUCTION

      6.2 MULTILEVEL PWM-SSSC

      6.3 PWM SSSC CONTROL ALGORITHM

      6.4 DIGITAL SIMULATION RESULTS

7. SUBSYCHRONOUS RESONANCE

      7.1 SUBSYNCHRONOUS RESONANCE (SSR) PHENOMENON

      7.2 DAMPING CONTRIBUTIONS

      7.3 FIXED SERIES CAPACITORS (SC)

      7.4 THYRISTOR CONTROLLED SERIES CAPACITORS (TCSC)

      7.5 STATIC SYNCHRONOUS SERIES COMPENSATOR (SSSC)

      7.6 ASSESSING SSR CONDITIONS USING THE FREQUENCY SCANNING METHOD

PART III SSSC INSTALLATIONS

8. EXISTING INSTALLATIONS

      8.1 COMPONENTS OF AN SSSC

            8.1.1 Control

            8.1.2 Protection

      8.2 DESCRIPTION OF EXISTING INSTALLATIONS

            8.2.1 UPFC Inez, AEP, USA

                  8.2.1.1 Overview

                  8.2.1.2 Commissioning and test results

            8.2.2 UPFC Kangjin, Kepco, Korea

                  8.2.2.1 Overview

                  8.2.2.2 Commissioning and test results

            8.2.3 CSC Marcy, NYPA, USA

                  8.2.3.1 Overview

                  8.2.3.2 Commissioning and test results

                  8.2.3.3 Operational experience

PART IV FUTURE OUTLOOK

9. TRANSFORMERLESS SSSC

      9.1 MERITS JUSTIFYING DEVELOPMENT OF TRANSFORMER-LESS SSSC

      Figure 9.1 Basic transformer-less SSSC scheme using “H-bridge” converters

      9.2 NEW CONVERTER PLATFORM

            9.2.1 Carrier Neutralized PWM

            9.2.2 SSSC Platform Structure

      9.3 POWER SEMICONDUCTOR TECHNOLOGY DEVELOPMENTS

      9.4 EMERGING POWER SEMICONDUCTOR SWITCHES

      9.5 STATE OF THE ART OF POWER SEMICONDUCTOR SWITCHES

            9.5.1 Voltage and current rating

            9.5.2 Recent developments of thyristor devices

BIBLIOGRAPHIES